Investigation on the Impact of Program/Erase Cycling Frequency on Data Retention of Nanoscale Charge Trap Nonvolatile Memory

摘要

This letter presents a detailed study to investigate the impact of program/erase (P/E) cycling frequency on threshold voltage (Vt) instability of nanoscale nitride-based charge trap nonvolatile memory (NB-CTNVM) devices. Post-P/E cycled Vt instability was found to exacerbate with higher P/E cycling frequency, which resulted in lower activation energy ( (mathbf {textit{E}}_{mathbf {textit{a}}}) ). The (mathbf {textit{E}}_{mathbf {textit{a}}}) obtained is 30% higher than those of floating gate NVM. In view of future demand for faster write speed of NVM devices, these findings indeed have critical impact on the selection of the acceleration factor and (mathbf {textit{E}}_{mathbf {textit{a}}}) applied to assess accurately the reliability performance of nanoscale CTNVM.