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Weak Erase After Programming To Improve Data Retention In Charge-Trapping Memory

机译:编程后微擦除,以改善电荷陷阱存储器中的数据保留

摘要

Techniques are provided to improve long term data retention in a charge-trapping memory device. In addition to a primary charge-trapping layer in which most charges are stored, the memory device may include a tunneling layer comprising an engineered tunneling barrier such as oxide-nitride-oxide. The nitride in the tunneling layer may also store some charges after programming. After the programming, a data retention operation is performed which de-traps some electrons from the tunneling layer, in addition to injecting holes into the tunneling layer which form neutral electron-hole dipoles in place of electrons. These mechanisms tend to lower threshold voltage. Additionally, the data retention operation redistributes the electrons and the holes inside the charge-trapping layer, resulting in an increase in threshold voltage which roughly cancels out the decrease when the data retention operation is optimized.
机译:提供了用于改善电荷捕获存储设备中的长期数据保留的技术。除了其中存储了大多数电荷的主电荷俘获层之外,存储器件还可包括隧穿层,该隧穿层包括工程化的隧穿势垒,例如氧化物-氮化物-氧化物。在编程之后,隧穿层中的氮化物还可以存储一些电荷。编程之后,执行数据保留操作,除了将空穴注入到隧道层中以代替电子形成中性电子-空穴偶极子之外,该数据保留操作还从隧道层捕获了一些电子。这些机制倾向于降低阈值电压。此外,数据保留操作会重新分配电荷陷阱层内部的电子和空穴,从而导致阈值电压增加,从而在优化数据保留操作时大致抵消了这种降低。

著录项

  • 公开/公告号US2016111164A1

    专利类型

  • 公开/公告日2016-04-21

    原文格式PDF

  • 申请/专利权人 SANDISK TECHNOLOGIES INC.;

    申请/专利号US201414518340

  • 发明设计人 CHING-HUANG LU;YINGDA DONG;HONG-YAN CHEN;

    申请日2014-10-20

  • 分类号G11C16/14;G11C16/04;

  • 国家 US

  • 入库时间 2022-08-21 14:37:15

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