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Advances on high current load effects on lead-free solder joints of SMD chip-size components and BGAs

机译:高电流负载对SMD芯片尺寸组件和BGA的无铅焊点的影响

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PurposeThis paper aims to present a novel approach on investigating critical current densities in the solder joints of chip-size surface-mounted components or device (SMD) components and ball grid array (BGA) lead-free solder joints with the focus of via-in-pad geometries. The investigation involves a numerical approach and a physical validation with selected geometry configurations and high current loads to reveal possible failure sources. The work is a continuation of a previous study.Design/methodology/approachCurrent density was investigated using finite element modeling on BGA joints. Dummy BGA components, 0402 and 0603 zero ohm jumper resistors, were used, both in daisy chain setups on standard FR4 printed circuit boards (PCBs). Respective physical loading experiments were set to find effects of elevated current density at hot zones of the joints. Cross-section analysis, scanning electron microscopy and shear force tests were used to analyze the joints.FindingsThe findings reveal alterations in the joints, while the current loading is not directly affecting the structure. The modeling reveals the current density map in the selected formations with increased current crowding zones. Overall, the degradation does not reach the level of electromigration (EM)-induced voiding due to the limiting factor of the FR4 substrate.Practical implicationsThe heavy current load affects joint reliability, but there are limitations of EM-induced failures on PCB-based assemblies due to the thermomechanical weakness of the FR4 material.Originality/valueThe experiments investigate current density from a novel aspect on frequently used BGA surface mounted components with modeling configurations focusing on possible effects of via-in-pad structure.
机译:目的本文旨在提出一种新颖的方法来研究芯片尺寸的表面安装组件或器件(SMD)组件和球栅阵列(BGA)无铅焊点的焊点中的临界电流密度,重点是通孔设计。垫的几何形状。该调查涉及一种数值方法以及对具有选定几何形状配置和高电流负载的物理验证,以揭示可能的故障源。该工作是先前研究的继续。设计/方法/方法使用BGA接头上的有限元建模研究了电流密度。在标准FR4印刷电路板(PCB)上的菊花链设置中,都使用了虚拟BGA组件,0402和0603零欧姆跳线电阻。进行了相应的物理负载实验,以发现在接头的热区电流密度升高的影响。用截面分析,扫描电子显微镜和剪切力试验对接头进行分析。发现结果表明接头发生了变化,而电流负荷并没有直接影响结构。该模型揭示了选定地层中的电流密度图,并增加了电流拥挤区。总体而言,由于FR4基板的限制因素,降解未达到电迁移(EM)引起的空洞的程度。实践意义大电流负载会影响接头的可靠性,但EM引起的故障在基于PCB的组件上存在局限性原始性/价值实验从新颖的方面研究了常用BGA表面贴装元件的电流密度,其模型配置着重于焊盘内通孔结构的可能影响。

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