Development of Through Glass Vias (TGV) for 3D-IC Integration

摘要

Through-substrate vias are critical for 3D-IC integration. The choice of glass as an interposer substrate containing Through Glass Vias (TGV), presents some interesting challenges and opportunities, making glass a compelling alternative to silicon. There are two primary challenges to begin building a precision interposer in thin glass. The first is high quality thin glass wafers (300 mm OD, thickness < 0.10 mm, warp and total thickness variation (TTV) of 30 μm and 1 μm respectively）. The second challenge is developing a process capable of providing small (5-10 μm) precision vias in a cost-effective way. Glass represents a large class of materials with a wide range of material properties. The first step in developing TGV is to identify the most appropriate glass composition for the application, which furthermore defines important properties such as coefficient of thermal expansion (CTE) and other mechanical properties, chemical durability and electrical properties. The manufacturing process used to develop the glass has a significant impact on quality and manufacturability. Fusion formed glass provides a solution for high volume manufacturing supply in an as-formed, ultrathin, pristine glass manufactured to tight tolerances, and avoids the issues associated with polishing or thinning. The supply of < 100μm as-formed ultra-thin glass wafers can compare very favorably in cost relative to polished or thinned glass as well as thinned silicon wafer. While there are many technologies that have demonstrated vias in glass, challenges remain around via size and via pitch, wafer strength and reliability to be resolved. However, substantial progress has been made to meet these challenges. Specific characterization data from some of these processes will be presented.