Integration and 3D-ICs driving developments in wafer bonding

摘要

D integration was a major driver toward better alignment accuracy. Establishing electrical interconnects with through-silicon vias (TSVs) with a diameter as small as 1-2μm required alignment accuracies in the submicron range. The wafer-to-wafer alignment principle has to be in line with the goal of a standardized interface and integration scheme. Therefore, the traditional alignment principles based on backside alignment keys or infrared (IR)-transparent wafers are not flexible enough.