首页> 外文会议>Semiconductor Manufacturing Technology Workshop >Study of photo resist-free process for shallow trench isolation etch on advance VLSI technology
【24h】

Study of photo resist-free process for shallow trench isolation etch on advance VLSI technology

机译:预先VLSI技术浅沟槽隔离蚀刻光抗蚀剂的研究

获取原文

摘要

The photo resist (PR) tilting defects and bridge defect occurred for shallow trench isolation etch with PR free process on high density plasma etch chamber TCP9400 were studied. First, serious PR tilting defects induced by 193 nm PR charging effect during the etching process was noted in our study. Through the L9 experiment data, a new etch recipe which optimizes the source power, pressure and etch gas chemistry was studied to solve this problem. Results showed that the new approach can not only eliminated defect, but also improve device enhanced effective channel (Weff) and Cp yield. The bridge defect was recovered by optimizing PR in situ strip procedure. The defect count can significantly reduced to 75% of its original level.
机译:研究了浅沟槽隔离蚀刻的光抗蚀剂(PR)倾斜缺陷和桥梁缺陷,对高密度等离子体蚀刻室TCP9400进行了PR自由过程。首先,在我们的研究中注意到在蚀刻过程中由193nm Pr充电效果引起的严重PR倾斜缺陷。通过L9实验数据,研究了一种新的蚀刻配方,用于解决源功率,压力和蚀刻气体化学来解决这个问题。结果表明,新方法不仅可以消除缺陷,还可以改善设备增强的有效通道(WEFF)和CP产量。通过在原位带材过程中优化PR,回收桥梁缺陷。缺陷计数可以显着降至其原始水平的75%。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号