On-Chip Transient Detection Circuit for System-Level ESD Protection in CMOS ICs

机译：片上瞬态检测电路，用于CMOS IC中的系统级ESD保护

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A new on-chip transient detection circuit for system-level electrostatic discharge (ESD) protection is proposed in this paper. The circuit performance to detect different positive and negative fast electrical transients has been investigated by HSPICE sim

机译：本文提出了一种用于系统级静电放电（ESD）保护的新型片上瞬态检测电路。 HSPICE sim已研究了用于检测不同的正负快速电气瞬变的电路性能

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《Custom Integrated Circuits Conference, 2006 IEEE》|2006年|P.361-364|共4页
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Ming-Dou Ker; Cheng-Cheng Yen; Pi-Chia Shih;
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中图分类工业技术;
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CMOS integrated circuits; detector circuits; electrostatic discharge; transients; 0.13 micron; CMOS IC; HSPICE simulator; fast electrical transients; on-chip transient detection circuit; system-level ESD protection; system-level ESD zapping; system-level electrosta;

机译：CMOS集成电路;检测器电路;静电放电;瞬态; 0.13微米; CMOS IC; HSPICE仿真器;快速电瞬态;片上瞬态检测电路;系统级ESD保护;系统级ESD防静电;系统级电;

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专利

1. On-Chip Transient Detection Circuit for System-Level ESD Protection in CMOS Integrated Circuits to Meet Electromagnetic Compatibility Regulation [J] . Ker M., Yen C., Shih P. IEEE Transactions on Electromagnetic Compatibility . 2008,第1期

机译：片上瞬态检测电路，可满足CMOS集成电路中系统级ESD保护的要求，符合电磁兼容性规定
2. Area-Efficient On-Chip Transient Detection Circuit for System-Level ESD Protection Against Transient-Induced Malfunction [J] . Chen Wen-Chieh, Ker Ming-Dou Nature reviews Cancer . 2019,第2期

机译：用于系统级ESD防止瞬态诱导故障的区域高效的片上瞬态检测电路
3. SCR-based transient detection circuit for on-chip protection design against system-level electrical transient disturbance [J] . Ming-Dou Ker, Wan-Yen Lin, Cheng-Cheng Yen Microelectronics & Reliability . 2014,第1期

机译：基于SCR的瞬态检测电路，用于针对系统级电瞬变干扰的片上保护设计
4. On-Chip Transient Detection Circuit for System-Level ESD Protection in CMOS ICs [C] . Ming-Dou Ker, Cheng-Cheng Yen, Pi-Chia Shih Custom Integrated Circuits Conference, 2006 IEEE . 2006

机译：片上瞬态检测电路，用于CMOS IC中的系统级ESD保护
5. Low loading capacitance on-chip electrostatic discharges (ESD) protection circuits for gallium arsenide heterojunction bipolar transistor (HBT) radio frequency integrated circuits (RFIC). [D] . Ma, Yintat. 2004

机译：用于砷化镓异质结双极晶体管（HBT）射频集成电路（RFIC）的低负载电容片上静电放电（ESD）保护电路。
6. Robust and Latch-Up-Immune LVTSCR Device with an Embedded PMOSFET for ESD Protection in a 28-nm CMOS Process [O] . Ruibo Chen, Hongxia Liu, Wenqiang Song, 2020

机译：具有嵌入式PMOSFET的鲁棒和锁定的免疫LVTSCR器件用于28 nm CMOS过程中的ESD保护
7. CMOS on-chip electrostatic discharge protection circuit using four-SCR structures with low ESD-trigger voltage [O] . Ming-dou Ker, Senior Member, Kuo-chun Hsu 1994

机译：CmOs片上静电放电保护电路，采用具有低EsD触发电压的四sCR结构

On-Chip Transient Detection Circuit for System-Level ESD Protection in CMOS ICs

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