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Design, Fabrication and Implementation of Smart Three Axis Compliant Interconnects for Ultra-Thin Chip Stacking Technology

机译：超薄芯片堆叠技术的智能三轴兼容互连器的设计，制造和实现

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《Electronic Components and Technology Conference, 2006. Proceedings. 56th》|2006年|P.1147-1153|共7页
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Arunasalam P.; Ackler H.D.; Sammakia B.G.;
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1. Microfabrication of ultrahigh density wafer-level thin film compliant interconnects for through-silicon-via based chip stacks [J] . Arunasalam P, Ackler HD, Sammakia BG Journal of Vacuum Science & Technology. B, Microelectronics and Nanometer Structures . 2006,第4期

机译：超高密度晶圆级薄膜兼容互连的微加工，用于基于硅通孔的芯片堆栈
2. 3D Chip Stack Technology Using Through-Chip Interconnects [J] . Peter Benkart, Alexander Kaiser, Andreas Munding, IEEE Design & Test of Computers Magazine . 2005,第6期

机译：使用芯片间互连的3D芯片堆栈技术
3. A chips-first multichip module implementation of passive and active test coupons utilizing Texas Instruments' high density interconnect technology [J] . Schaefer T.M., Kacines J.J. IEEE transactions on components, packaging, and manufacturing technology. Part B, Advanced packaging . 1996,第2期

机译：利用德州仪器（TI）的高密度互连技术的无源和有源测试样片的第一个多芯片模块实现
4. Design, Fabrication and Implementation of Smart Three Axis Compliant Interconnects for Ultra-Thin Chip Stacking Technology [C] . Arunasalam P., Ackler H.D., Sammakia B.G. Electronic Components and Technology Conference . 2006

机译：智能三轴兼容互连的设计，制造和实现，用于超薄芯片堆叠技术
5. Microwave performance and fabrication of quilt packaging, a novel chip-to-chip interconnect technology. [D] . Kopp, David P. 2014

机译：微波性能和被子包装的制造，一种新颖的芯片到芯片互连技术。
6. Fabrication of Low Temperature Carbon Nanotube Vertical Interconnects Compatible with Semiconductor Technology [O] . Sten Vollebregt, Ryoichi Ishihara 2015

机译：兼容半导体技术的低温碳纳米管垂直互连件的制造
7. High yield fabrication process for 3D-stacked ultra-thin chip packages using photo-definable polyimide and symmetry in packages [O] . Priyabadini Swarnakamal, Sterken Tom, Cauwe Maarten, 2014

机译：采用光可定义聚酰亚胺和封装对称性的3D堆叠超薄芯片封装的高产量制造工艺

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