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One Micron Damascene Redistribution for Fan-Out Wafer Level Packaging using a Photosensitive Dielectric Material

机译:使用光敏介电材料的扇形晶圆级封装的一种微米大马士革重新分布

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This study investigates creation of 1.0μm RDL structures by a damascene process utilizing a photosensitive permanent dielectric material. The advantage of the photosensitive dielectric approach is that the Cu overburden removal does not affect the quality of the embedded Cu lines. In comparison, for a semi-additive process the Cu seed etch affects the final dimensions of the RDL lines [1]. Damascene processing of RDL will also result in a flat wafer surface which greatly improves the lithographic performance for subsequent layers. Finally, the Cu line is surrounded on the sides and bottom by a Ti barrier layer which provides a Cu diffusion barrier for enhanced reliability [2,3]. The completed 1.0μm RDL damascene process is evaluated using a test chip design that includes metrology structures for in-line monitoring and CDSEM measurements, and comb and serpentine electrical test structures. The electrical results for the damascene process show significant advantages compared to the semi-additive process.
机译:这项研究研究了采用光敏永久介电材料通过镶嵌工艺形成的1.0μmRDL结构。光敏电介质方法的优点是去除铜的覆盖层不会影响嵌入的铜线的质量。相比之下,对于半添加工艺,Cu晶种蚀刻会影响RDL线的最终尺寸[1]。 RDL的大马士革加工还将产生平坦的晶圆表面,这将大大提高后续层的光刻性能。最后,铜线在侧面和底部被一层钛阻挡层包围,该阻挡层为提高可靠性提供了铜扩散阻挡层[2,3]。使用测试芯片设计对完整的1.0μmRDL镶嵌工艺进行评估,该设计包括用于在线监测和CDSEM测量的计量结构,以及梳状和蛇形电气测试结构。与半加成工艺相比,镶嵌工艺的电学结果显示出显着的优势。

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