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Built-in self test methodology for diagnosis of backend wearout mechanisms in SRAM cells

机译:内置自我测试方法,用于诊断SRAM单元中的后端磨损机制

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In this paper we present a Built-In Self Test (BIST) methodology for diagnosis of backend time-dependent dielectric breakdown (BTDDB), via voiding due to electromigration (EM), and stress-induced voiding (SIV) in SRAM cells. Our built-in self test methodology consists of two test procedures. First, faulty cells suffering from wearout mechanisms in the SRAM system are isolated. Then, these faulty cells are tested to determine the cause of wearout.
机译:在本文中,我们介绍了一种内置自测(BIST)方法,用于通过SRAM单元中的电迁移(EM)和应力诱发的空洞(SIV)来诊断后端时间相关的介电击穿(BTDDB)。我们内置的自测方法包括两个测试过程。首先,隔离遭受SRAM系统中磨损机制影响的故障单元。然后,对这些故障电池进行测试以确定磨损的原因。

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