automatic test pattern generation; failure analysis; flip-chip devices; focused ion beam technology; optical microscopy; tape automated bonding; ATPG tools; EFA; FIB sections; PFA; SOM; automatic test pattern generation tools; chip package interaction; electrical failure analysis; fine pitch copper pillar assembly; fine pitch flip chip packages; focused ion beam sections; high die placement accuracy; induced ILD integrity issues; mass production; physical failure analysis methodology; primary load transference link; scanning optical microscopy; thermal compression bonding; thermocompression assembly induced stresses; Assembly; Automatic test pattern generation; Bonding; Bonding forces; Dielectrics; Failure analysis; Stress;
机译:芯片/薄膜组装过程中超细间距柔性覆晶和带载封装的引线断裂问题的数值失效分析
机译:倒装芯片封装中超低$ k $互连的结构优化改善了芯片-封装相互作用和可靠性
机译:细间距大晶粒铜/低K倒装芯片封装的底部填充选择,特性和可靠性研究
机译:芯片包交互诱导细距倒装芯片封装中的ILD Integrity问题
机译:一种超细间距倒装芯片互连封装的系统方法。
机译:激光诱导的单芯片倒装芯片封装的正向转移
机译:小间距共晶焊料倒装芯片互连中的材料和工艺问题
机译:薄基板,精细凸块间距和小型原型模具的倒装芯片组装。