High-density V-groove MOS-controlled thyristors, insulated-gate transistors, and MOSFETs, and methods for fabrication

摘要

Various vertical-channel MOS-gated power semiconductor devices attain a high current capacity through minimization of various lateral distances within the devices and also attain essentially minimum cell size. Processes for fabricating these devices employ a first mask to define both the location of a channel-terminating upper electrode region and the location of a V-groove, thereby avoiding any mask alignment at this point in the process. In one embodiment, the first mask comprises silicon nitride, and is eventually removed. In another embodiment, the first mask comprises molybdenum silicide, and remains in the device structure to ultimately serve as the upper main electrode. Two different techniques are employed for opening contact windows through the polysilicon gate electrode material, and different structures result. In one of these, a plurality of short windows are provided generally at right angles to the V-grooves.