Device with semiconductors, comprising insulated-gate field-effect transistors and bipolar transistors and method of fabrication

摘要

In a device comprising both a bipolar transistor (21) and complementary MOS transistors (22, 23), buried n+ layers (3a, 51a) are formed on a p-type silicon substrate, 1, with a concentration of impurities which is higher in the region provided for forming a p-channel MOS transistor (23) than in the region provided for forming an npn bipolar transistor 21. It is thus possible to maintain the performance of the npn bipolar transistor, while enhancing that of the CMOS transistors comprising an n-channel transistor (22) and a p-channel transistor (23), especially as far as resistance to holing and enhancement of the unlocking tolerance are concerned. … IMAGE …