An atomic planar-doped field-effect transistor is disclosed, which is featured by a channel region (12) of a limited thickness between source (16) and drain (18) with at least one atomic planar-doped layer (13) formed therein and a barrier layer or layers (14,15) provided on the upper or lower side or on the both sides of the channel region (12). The channel region (12) is formed of a semiconductor of a low impurity concentration or of an n-type with the atomic planar-doped layer (13) having high concentration donor impurities or of a p-type with the atomic planar-doped layer (13) having high concentration acceptor impurities. The upper barrier layer (15) is provided between the channel region (12) and a gate electrode (17) and the lower barrier layer (14), if present, is provided between the channel region (12) and a substrate (11). They are formed of a semiconductor of a low impurity concentration which is different from the semiconductor of the channel region (12) and makes a heterojunction with the channel region (12) and which has a smaller electron affinity than the semiconductor of the channel region (12) having the donor planar-doped layer (13) or a larger value of a sum of electron affinity and energy gap than the semiconductor of the channel region (12) having the acceptor planar-doped layer (13). With the upper barrier layer (15), the transistor of the present invention has a large gate-forward turn-on voltage. The short channel effects are suppressed by adding the lower barrier layer (14) to the transistor.
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