首页> 外国专利> Semiconductor integrated circuit device including two types of MOSFETS having source/drain region different in sheet resistance from each other

Semiconductor integrated circuit device including two types of MOSFETS having source/drain region different in sheet resistance from each other

机译:包括两种具有薄层电阻彼此不同的源/漏区的MOSFET的半导体集成电路器件

摘要

In the semiconductor integrated circuit device of the present invention which uses MOSFETs as its components, the gate electrode of the MOSFET is constructed by using a silicide gate, a polycide gate or a metal gate. The source-drain region of the MOSFET for the internal circuit which does not require connection to an external circuit has a silicide structure, and the source-drain region of the MOSFET for the buffer circuit which requires a direct connection to an external device has a region which is not of silicide structure at least in a portion adjacent to the gate electrode. The gate electrode and the source-drain region of the internal circuit have low resistances so that it is possible to realize an increase in the operating speed by using them as a part of the wirings. Further, in the source-drain region of the buffer circuit there is provided a region of high resistance in the vicinity of the gate electrode so that it is possible to enhance the ESD resistance.
机译:在使用MOSFET作为其组件的本发明的半导体集成电路器件中,通过使用硅化物栅极,多晶硅化物栅极或金属栅极来构造MOSFET的栅极。用于内部电路的不需要连接到外部电路的MOSFET的源极-漏极区域具有硅化物结构,而用于需要直接连接到外部设备的缓冲电路的MOSFET的源极-漏极区域具有硅化物结构。至少在与栅电极相邻的部分中不是硅化物结构的区域。内部电路的栅电极和源漏区域具有低电阻,因此可以通过将它们用作布线的一部分来实现工作速度的提高。此外,在缓冲电路的源极-漏极区域中,在栅电极附近设置有高电阻区域,从而可以提高ESD电阻。

著录项

  • 公开/公告号US5283449A

    专利类型

  • 公开/公告日1994-02-01

    原文格式PDF

  • 申请/专利权人 NEC CORPORATION;

    申请/专利号US19910742380

  • 发明设计人 HIDEYUKI OOKA;

    申请日1991-08-08

  • 分类号H01L27/02;

  • 国家 US

  • 入库时间 2022-08-22 04:32:15

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