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Delayed read/write scheme for SRAM interface compatible DRAM
Delayed read/write scheme for SRAM interface compatible DRAM
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机译:SRAM接口兼容DRAM的延迟读/写方案
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摘要
A method of internally executing an externally initiated access to a dynamic memory array including a plurality of dynamic memory cells, wherein the dynamic memory cells require periodic refreshing, is achieved. The method comprises, first, determining if an external access to the dynamic memory array has been initiated. Second, a waiting period of RW idle time is inserted. The RW idle time comprises a sum of a row access time plus a pre-charge time. A pending refresh is performed during said RW idle time. A pending write access may be performed during the RW idle time. Finally, the external access is internally executed in the dynamic memory array after the RW idle time.
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