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Structure and assembly procedure for low stress thin die flip chip packages designed for low-K Si and thin core substrate
Structure and assembly procedure for low stress thin die flip chip packages designed for low-K Si and thin core substrate
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机译:专为低K Si和薄芯基板设计的低应力薄裸晶倒装芯片封装的结构和组装过程
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摘要
Provided are semiconductor die flip chip packages and semiconductor die flip chip package components where certain properties of the packages/components are controlled to facilitate management of the package stresses. Also provided are fabrication methods for such packages and package components. For instance, the thickness of a die can be controlled such that the stress generated/experienced by the die is minimized. As such, the package stress is managed to suitable levels for incorporation of a low-K Si die and/or a thin package substrate. Further, a thin die can be attached to a heat spreader to increase the rigidity for easier handling during fabrication of the semiconductor die flip chip package.
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