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Superior Integrity of High-K Metal Gate Stacks by Capping STI Regions
Superior Integrity of High-K Metal Gate Stacks by Capping STI Regions
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机译:通过封盖STI区域实现高K金属栅堆叠的卓越完整性
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摘要
When forming high-k metal gate electrode structures in an early manufacturing stage, integrity of an encapsulation and, thus, integrity of sensitive gate materials may be improved by reducing the surface topography of the isolation regions. To this end, a dielectric cap layer of superior etch resistivity is provided in combination with the conventional silicon dioxide material.
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