首页> 外国专利> Soft error rate (SER) reduction in advanced silicon processes

Soft error rate (SER) reduction in advanced silicon processes

机译:先进硅工艺中的软错误率(SER)降低

摘要

Provided is a method of fabricating a semiconductor device. The method includes providing a substrate. The method includes forming a portion of an interconnect structure over the substrate. The portion of the interconnect structure has an opening. The method includes obtaining a boron-containing gas that is free of a boron-10 isotope. The method includes filling the opening with a conductive material to form a contact. The filling of the opening is carried out using the boron-containing gas. Also provided is a semiconductor device. The semiconductor device includes a substrate. The semiconductor device includes an interconnect structure formed over the substrate. The semiconductor device includes a conductive contact formed in the interconnect structure. The conductive contact has a material composition that includes Tungsten and Boron, wherein the Boron is a 11B-enriched Boron.
机译:提供一种制造半导体器件的方法。该方法包括提供衬底。该方法包括在衬底上方形成互连结构的一部分。互连结构的该部分具有开口。该方法包括获得不含硼10同位素的含硼气体。该方法包括用导电材料填充开口以形成接触。开口的填充是使用含硼气体进行的。还提供了一种半导体器件。半导体器件包括基板。半导体器件包括形成在衬底上方的互连结构。半导体器件包括形成在互连结构中的导电触点。导电触点具有包括钨和硼的材料成分,其中硼是富含 11 B的硼。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号