INTEGRATED BONDLINE SPACERS FOR WAFER LEVEL PACKAGED CIRCUIT DEVICES
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机译:晶圆级封装设备的集成绑定线间隔
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摘要
A method of forming a wafer level packaged circuit device ,the method comprising forming a device wafer, forming a cap wafer,forming a cap wafer, forming,on either, one or more material layers used in the formation of either the cap wafer or the device wafer, and left remaining in a region of a substrate of either the cap wafer or the device wafer, and bonding the cap wafer to the device wafer.
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