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integrated electronic memory cell apparatus, phase change memory operation method, method of manufacturing a phase change memory cell on a substrate, design structure for the design, manufacture or testing of integrated circuits and computer program for execute said method of operation
integrated electronic memory cell apparatus, phase change memory operation method, method of manufacturing a phase change memory cell on a substrate, design structure for the design, manufacture or testing of integrated circuits and computer program for execute said method of operation
A planar phase change memory cell with parallel electrical paths. The memory cell includes a first conductive electrode region having a length greater than its width and an axis aligned with the length. The memory cell also includes a second conductive electrode region having an edge oriented at an angle to the axis of the first conductive electrode region. The memory cell further includes an insulator region providing a lateral separation distance between an end of the first conductive electrode region and the edge of the second conductive electrode region, the insulator region including at least part of an insulator film and the lateral separation distance is responsive to the thickness of the insulator film.
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