INTEGRATED CIRCUIT WITH PHASE-CHANGE MEMORY CELLS AND METHOD FOR ADDRESSING PHASE-CHANGE MEMORY CELLS

摘要

The present invention relates to integrated circuit comprising a plurality of bit­lines (bl) and a plurality of word-lines (wl) as well as a plurality of memory-cells (MC) coupled between a separate bit-line/word-line pair of the plurality of bit-lines (bl) and word­lines (wl) for storing data in the memory cell. Each memory cell (MC) comprises a selecting unit (T) and a programmable resistance (R). The value of the phase-change resistance (R) is greater than the value of a first phase-change resistance (Ropt) defined by a supply voltage (Vdd) divided by a maximum drive current (Im,) through said first phase-change resistor (Ropt).