Integrated circuit with phase-change memory cells and method for addressing phase-change memory cells

摘要

The present invention relates to an integrated circuit comprising a plurality of bitlines (b1) and a plurality of word-lines (w1) as well as a plurality of memory-cells (MC) coupled between a separate bit-line/word-line pair of the plurality of bit-lines (b1) and wordlines (w1) for storing data in the memory cell. Each memory cell (MC) comprises a selecting unit (T) and a programmable resistance (R). The value of the phase-change resistance (R) is greater than the value of a first phase-change resistance (R_opt) defined by a supply voltage (V_dd) divided by a maximum drive current (I_m) through said first phase-change resistor (R_opt).