SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR OPERATING THEREOF

摘要

The present invention relates to a semiconductor memory device, which comprises a memory cell array, a peripheral circuit, and a control logic. The memory cell array includes a plurality of memory blocks. The peripheral circuit performs a read operation for the memory cell array. The control logic controls an operation of the peripheral circuit. Additionally, the control logic controls the peripheral circuit to perform a repair column masking operation of a selected memory block among the memory blocks, controls the peripheral circuit to perform a first test operation for first drain selection transistors included in the selected memory block, and controls the peripheral circuit to perform the first test operation for second drain selection transistors different from the first drain selection transistors while maintaining a result of the repair column masking operation.