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Polymer film stencil process for fan-out wafer-level packaging of semiconductor devices
Polymer film stencil process for fan-out wafer-level packaging of semiconductor devices
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机译:聚合物薄膜模板工艺用于扇出半导体器件的晶圆级封装
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摘要
The present invention provides stencil-based processes for fan-out wafer-level packaging (“FOWLP”) that addresses the limitations associated with prior art over-molding of dies. In the inventive process, a temporary carrier is coated with a release layer and curable adhesive backing layer. A die stencil film is then laminated to the coated carrier, and the dies are placed inside pre-formed cavities created in the laminated stencil. The gaps between the dies and the stencil are filled with a curable polymeric material, and a redistribution layer is constructed according to conventional processes. This process results in better repeatability, lower bowing in the carrier, and enhanced downstream processing.
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