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Fabrication, Characterization, and Modelling of Self-Assembled Silicon Nanostructure Vacuum Field Emission Devices

机译:自组装硅纳米结构真空场发射器件的制备,表征和建模

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摘要

The foundation of vacuum nanoelectronics was laid as early as in 1961 when Kenneth Shoulders proposed the development of vertical field-emission micro-triodes. After years of conspicuous stagnancy in the field much interest has reemerged for the vacuum nanoelectronics in recent years. Electron field emission under high electric field from conventional and exotic nanoemitters, which have now been made possible with the use of modern day technology, has been the driving force behind this renewal of interest in vacuum nanoelectronics. In the research reported in this thesis self-assembled silicon nanostructures were studied as a potential source of field emission for vacuum nanoelectronic device applications. Whiskerlike protruding silicon nanostructures were grown on untreated n- and p-type silicon surfaces using electron-beam annealing under high vacuum. The electrical transport characteristics of the silicon nanostructures were investigated using conductive atomic force microscopy (C-AFM). Higher electrical conductivities for the nanostructured surface compared to that for the surrounding planar silicon substrate region were observed. Non-ideal diode behaviour with high ideality factors were reported for the individual nanostructure-AFM tip Schottky nanocontacts. This demonstration, indicative of the presence of a significant field emission component in the analysed current transport phenomena was also detailed. Field emission from these nanostructures was demonstrated qualitatively in a lift-mode interleave C-AFM study.A technique to fabricate integrated field emission diodes using silicon nanostructures in a CMOS process technology was developed. The process incorporated the nanostructure growth phase at the closing steps in the process flow. Turn-on voltages as low as ~ 0.6 V were reported for these devices, which make them good candidates for incorporation into standard CMOS circuit applications. Reproducible I V characteristics exhibited by these fabricated devices were further studied and field emission parameters were extracted. A new consistent and reliable method to extract field emission parameters such as effective barrier height, field conversion factor, and total emitting area at the onset of the field emission regime was developed and is reported herein. The developed parameter extraction method used a unified electron emission approach in the transition region of the device operation. The existence of an electron-supply limited current saturation region at very high electric field was also confirmed. Both the C-AFM and the device characterization studies were modelled and simulated using the finite element method in COMSOL Multiphysics. The experimental results – the field developed at various operating environments – are explained in relation to these finite element analyses. Field enhancements at the atomically sharp nanostructure apexes as suggested in the experimental studies were confirmed. The nanostructure tip radius effect and sensitivity to small nanostructure height variation were investigated and mathematical relations for the nanostructure regime of our interest were established. A technique to optimize the cathode-opening area was also demonstrated.Suggestions related to further research on field emission from silicon nanostructures, optimization of the field emission device fabrication process, and fabrication of field emission triodes are elaborated in the final chapter of this thesis.The experimental, modelling, and simulation works of this thesis indicate that silicon field emission devices could be integrated into the existing CMOS process technology. This integration would offer goods from both the worlds of vacuum and solid-sate nanoelectronics – fast ballistic electron transport, temperature insensitivity, radiation hardness, high packing density, mature technological backing, and economies of scale among other features.
机译:真空纳米电子学的基础早在1961年就已奠定,当时肯尼斯·斯瑟斯(Kenneth Shoulders)提出了垂直场发射微三极管的开发。经过多年在该领域的明显停滞,近年来对真空纳米电子学重新引起了很多兴趣。传统和奇异的纳米发射器在高电场下的电子场发射,如今已通过使用现代技术而成为可能,这是对真空纳米电子学重新产生兴趣的原动力。在本文报道的研究中,自组装硅纳米结构被研究为真空纳米电子器件应用的潜在场发射源。使用高真空下的电子束退火,在未处理的n型和p型硅表面上生长了晶须状突出的硅纳米结构。使用导电原子力显微镜(C-AFM)研究了硅纳米结构的电传输特性。观察到与周围的平面硅衬底区域相比,纳米结构表面的电导率更高。对于单个纳米结构-AFM尖端肖特基纳米接触,报道了具有高理想因子的非理想二极管行为。还详细说明了表明在所分析的电流传输现象中存在显着的场发射成分的演示。在提升模式交错C-AFM研究中定性地证明了这些纳米结构的场发射。开发了一种在CMOS工艺技术中使用硅纳米结构制造集成场致发射二极管的技术。该方法在工艺流程的关闭步骤中纳入了纳米结构的生长阶段。据报道,这些器件的导通电压低至约0.6 V,这使其成为合并到标准CMOS电路应用中的良好选择。进一步研究了这些制造的器件表现出的可再现的I V特性,并提取了场发射参数。开发了一种新的一致且可靠的方法来提取场发射参数,例如在场发射方案开始时的有效势垒高度,场转换系数和总发射面积。所开发的参数提取方法在设备操作的过渡区域中使用统一的电子发射方法。还确认了在非常高的电场下存在电子供应受限的电流饱和区域。 C-AFM和设备表征研究均使用COMSOL Multiphysics中的有限元方法进行了建模和仿真。实验结果-在各种操作环境下开发的领域-结合这些有限元分析进行了解释。证实了在实验研究中提出的原子尖锐的纳米结构顶点处的场增强。研究了纳米结构尖端半径效应和对小的纳米结构高度变化的敏感性,并建立了我们感兴趣的纳米结构状态的数学关系。最后,对硅纳米结构场致发射的研究,场致发射器件制造工艺的优化以及场致发射三极管的制造提出了相关的建议。本文的实验,建模和仿真工作表明,硅场发射器件可以集成到现有的CMOS工艺技术中。这种集成将提供来自真空和固态纳米电子世界的商品-快速弹道电子传输,温度不敏感,辐射硬度,高包装密度,成熟的技术支持以及规模经济等特点。

著录项

  • 作者

    Bari Mohammad Rezaul;

  • 作者单位
  • 年度 2011
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  • 原文格式 PDF
  • 正文语种 en
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