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A wafer-scale etching technique for high aspect ratio implantable MEMS structures

机译:用于高深宽比可植入MEMS结构的晶圆级蚀刻技术

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摘要

Microsystem technology is well suited to batch fabricate microelectrode arrays, such as the Utah electrode array (UEA), intended for recording and stimulating neural tissue. Fabrication of the UEA is primarily based on the use of dicing and wet etching to achieve high aspect ratio (15:1) penetrating electrodes. An important step in the array fabrication is the etching of electrodes to produce needle-shape electrodes with sharp tips. Traditional etching processes are performed on a single array, and the etching conditions are not optimized. As a result, the process leads to variable geometries of electrodes within an array. Furthermore, the process is not only time consuming but also labor-intensive. This report presents a wafer-scale etching method for the UEA. The method offers several advantages, such as substantial reduction in the processing time, higher throughput and lower cost. More importantly, the method increases the geometrical uniformity from electrode to electrode within an array (1.5 ± 0.5% non-uniformity), and from array to array within a wafer (2 ± 0.3% non-uniformity). Also, the etching rate of silicon columns, produced by dicing, are studied as a function of temperature, etching time and stirring rate in a nitric acid rich HF-HNO_3 solution. These parameters were found to be related to the etching rates over the ranges studied and more importantly affect the uniformity of the etched silicon columns. An optimum etching condition was established to achieve uniform shape electrode arrays on wafer-scale.
机译:微系统技术非常适合用于批量制造微电极阵列,例如犹他州的电极阵列(UEA),用于记录和刺激神经组织。 UEA的制造主要基于切割和湿蚀刻的使用,以实现高纵横比(15:1)的穿透电极。阵列制造中的一个重要步骤是蚀刻电极以生产具有尖锐尖端的针状电极。传统蚀刻工艺是在单个阵列上执行的,并且蚀刻条件并未得到优化。结果,该过程导致阵列内电极的几何形状可变。此外,该过程不仅费时,而且劳动强度大。该报告提出了用于UEA的晶圆级蚀刻方法。该方法具有几个优点,例如大大减少了处理时间,提高了产量和降低了成本。更重要的是,该方法增加了阵列内电极之间的几何均匀性(1.5±0.5%不均匀性),以及晶片内阵列之间的几何均匀性(2±0.3%不均匀性)。同样,研究了在富硝酸的HF-HNO_3溶液中通过切割产生的硅柱的蚀刻速率与温度,蚀刻时间和搅拌速率的关系。发现这些参数与所研究范围内的蚀刻速率有关,并且更重要地影响蚀刻的硅柱的均匀性。建立了最佳蚀刻条件以实现晶片级均匀形状的电极阵列。

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