0.11 μm fully-depleted SOI CMOS devices with 26nm silicon layer fabricated by bulk compatible process

摘要

A design for Fully-Depleted (FD) SOI CMOS devices is proposed. By optimizing halo/extension implantation and a thin CoSi{sub}2 process, 0.11 μm FD devices with a flat roll-off have been fabricated, even with Si layer 26 nm thick. Using this "bulk compatible" technology, a good inverter switching speed of 14 PS (at Vdd=1.2 V) has been achieved.