High-Performance Silicon Nanowire Gate-All-Around nMOSFETs Fabricated on Bulk Substrate Using CMOS-Compatible Process

摘要

In this letter, a novel self-aligned CMOS-compatible method for the fabrication of gate-all-around silicon nanowire MOSFETs (GAA SNWFETs) on bulk substrate has been proposed. The fabricated SNWFET featuring 33-nm gate length and 7-nm diameter shows the highest driving current ($I_{rm on} = hbox{2500} muhbox{A}/muhbox{m}$ at $V_{rm ds} = V_{rm gs} = hbox{1.0} hbox{V}$) among previously reported data and achieves high $I_{rm on}/I_{rm off}$ ratio of $hbox{10}^{5}$, lightening the promise for high performance and strong scalability of GAA SNWFETs. The process details and optimization procedure are extensively discussed.