首页> 外文期刊>Integrated Ferroelectrics >The Effect of Reduced Gate Leakage on Improved Retention Time of Metal-Ferroelectric (PbZr_(0.53)Ti_(0.47)O_3)-Insulator (ZrO_2)-Semiconductor Capacitors
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The Effect of Reduced Gate Leakage on Improved Retention Time of Metal-Ferroelectric (PbZr_(0.53)Ti_(0.47)O_3)-Insulator (ZrO_2)-Semiconductor Capacitors

机译:降低栅极泄漏对金属铁电(PBZR_(0.53)Ti_(0.47)O_3) - 恒定器(ZrO_2) - 界面电容器的改进保留时间的影响

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摘要

Al/ Pb (Zr_(0.53), Ti_(0.47)) O_3 (PZT) /ZrO_2/Si metal-ferroelectric-insulator semiconductor (MFIS) capacitors were fabricated. The wafers were given a H_2O_2 pre-treatment before ZrO_2 deposition and a HC1 treatment after deposition. The interface states were reduced from 5.62 x 10~(13)/cm~2 to 4.0 x 10~(12)/cm~2 and the composite dielectric constant of ZrO_2 film plus interfacial layer was increased from 5.54 to 7.3. The leakage current density was 5.4 x 10~(-6) A/cm~2 at a sweep voltage of 5 V. The retention time of Al/PZT/ZrO_2/Si capacitors after these surface treatments was increased from 13.3 hours to 17.1 days. The improved retention time is attributed to the reduced gate leakage current.
机译:Al / Pb(Zr_(0.53),Ti_(0.47))O_3(PZT)/ ZRO_2 / SI金属 - 铁壳绝缘体(MFIS)电容器是制造的。 晶片在ZrO_2沉积前给予H_2O_2预处理和沉积后的HC1处理。 界面状态降低了5.62×10〜(13)/ cm〜2至4.0×10〜(12)/ cm〜2,ZrO_2膜加界面层的复合介电常数从5.54增加到7.3。 扫描电流密度为5 V的扫描电压为5.4×10〜(-6)A / cm〜2。在这些表面处理后,Al / PZT / ZrO_2 / Si电容器的保留时间从13.3小时增加到17.1天 。 改进的保留时间归因于栅极泄漏电流的降低。

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