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3D Simulation-Based Research on the Effect of Interconnect Structures on Circuit Reliability

机译:基于3D仿真的互连结构对电路可靠性的影响研究

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Electromigration (EM) of the interconnects is a key factor in determining the reliability of an integrated circuit, especially for the present-day IC with shrinking interconnect dimension. The simulation of the EM reliability of the interconnects is usually performed using the line-via structure at the EM test temperature (e.g. 300 oC).However, such simulation using the line-via structure may not give the same void nucleation location as in the real circuit structure, especially at the circuit operation temperature (e.g. 90 oC). This change in failure site can cause mis-interpretation of the EM weak spot location when the line-via structure is used for data extrapolation in predicting the EM reliability of the entire circuit. This drives the need for the reliability simulation using a complete 3D circuit model. In this paper, we build several 3D models of a simple circuit with different interconnect structures and examine the effect of the layout structural changes, such as the via and contact positions and their numbers, the inter-transistor distance, the metal structure and layer number, on the circuit EM reliability. 3D circuit model. In this paper, we build several 3D models of a simple circuit with different interconnect structures and examine the effect of the layout structural changes, such as the via and contact positions and their numbers, the inter-transistor distance, the metal structure and layer number, on the circuit EM reliability. A 585.40% improvement in the EM lifetime can be obtained by using Metal 1 as the output line instead of the metal/via stacks, while a 136.97% reduction in the EM lifetime is observed when the number of contacts of the transistor reduces from 6 to 3. The simulation results are consistent with the experimental results in the literature and thus validate the capability of performing the EM lifetime comparison of different interconnect structures using the 3D circuit model.
机译:互连的电迁移(EM)是确定集成电路可靠性的关键因素,尤其是对于当今互连尺寸不断缩小的IC。互连的EM可靠性仿真通常是在EM测试温度(例如300 oC)下使用线孔结构进行的。但是,使用线孔结构进行的这种模拟可能无法提供与在EM测试温度下相同的空核位置真实的电路结构,尤其是在电路工作温度(例如90 oC)下。当线路过孔结构用于预测整个电路的EM可靠性时,如果使用线路过孔结构进行数据外推,则故障部位的这种变化可能会导致EM弱点位置的误解。这推动了使用完整的3D电路模型进行可靠性仿真的需求。在本文中,我们建立了一个具有不同互连结构的简单电路的3D模型,并检查了布局结构变化的影响,例如通孔和接触位置及其数量,晶体管间距离,金属结构和层数,对电路EM的可靠性。 3D电路模型。在本文中,我们建立了一个具有不同互连结构的简单电路的3D模型,并检查了布局结构变化的影响,例如通孔和接触位置及其数量,晶体管间距离,金属结构和层数,对电路EM的可靠性。通过使用金属1作为输出线而不是金属/通孔堆叠,可以将EM寿命提高585.40%,而当晶体管的触点数从6减少到6时,EM寿命将降低136.97%。 3.仿真结果与文献中的实验结果一致,从而验证了使用3D电路模型执行不同互连结构的EM寿命比较的能力。

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