Power estimation methods for sequential logic circuits

摘要

Recently developed methods for power estimation have primarilynfocused on combinational logic. We present a framework for the efficientnand accurate estimation of average power dissipation in sequentialncircuits. Switching activity is the primary cause of power dissipationnin CMOS circuits. Accurate switching activity estimation for sequentialncircuits is considerably more difficult than that for combinationalncircuits, because the probability of the circuit being in each of itsnpossible states has to be calculated. The Chapman-Kolmogorov equationsncan be used to compute the exact state probabilities in steady state.nHowever, this method requires the solution of a linear system ofnequations of size 2N where N is the number of flip-flops innthe machine. We describe a comprehensive framework for exact andnapproximate switching activity estimation in a sequential circuit. Thenbasic computation step is the solution of a nonlinear system ofnequations which is derived directly from a logic realization of thensequential machine. Increasing the number of variables or the number ofnequations in the system results in increased accuracy. For a widenvariety of examples, we show that the approximation scheme is withinn1-3% of the exact method, but is orders of magnitude faster for largencircuits. Previous sequential switching activity estimation methods cannhave significantly greater inaccuracies