CMOS current steering logic for low-voltage mixed-signal integratedcircuits

摘要

A quiet logic family-complementary metal-oxide-semiconductorn(CMOS) current steering logic (CSL)-has been developed for use innlow-voltage mixed-signal integrated circuits. Compared to a CMOS staticnlogic gate with its output range of ΔVlogic≈Vddn, a CSL gate swings onlynΔVlogic≈VT+0.25 V because the constantncurrent supplied by the PMOS load device is steered to ground throughneither an NMOS diode-connected device or switching network. Owing to thenconstant current, digital switching noise is 100× smaller than innstatic logic. Another useful feature which can be used to calibrate CSLnspeed against process, temperature, and voltage variations isnpropagation delay that is approximately constant versus supply voltagenand linear with bias current. Several CSL circuits have been fabricatednusing 0.8 and 1.2 Μm high-VT n-well CMOS processes. Twonself-loaded 39-stage ring oscillators fabricated using the 1.2 Μmnprocess (1.2 V power supply) exhibited power-delay products of 12 and 70nfJ with average propagation delays of 0.4 and 0.7 ns, respectively.nHigh-VT and low-VT CSL ALU's were operational at Vndd≈=0.70 V and Vdd≈0.40 V,nrespectively