HML, a novel hardware description language and its translation to VHDL

摘要

We present hardware ML (HML), an innovative hardware description language (HDL) based on the functional programming language SML. Features of HML not found in other HDL's include polymorphic types and advanced type checking and type inference techniques. We have implemented an HML type checker and a translator for automatically generating VHDL from HML descriptions. We generate a synthesizable subset of VHDL and automatically infer types and interfaces. This paper gives an overview of HML and discusses the translation from HML to VHDL and the type inference process.