A built-in self-test method for diagnosis of synchronous sequentialcircuits

摘要

We propose an approach for built-in fault diagnosis of synchronousnsequential circuits. The proposed approach distinguishes faults based onntheir detection by modified versions of a fault detection test sequencengenerated on-chip. The modified versions are defined by one-bit-widenauxiliary sequences, also generated on-chip. The auxiliary sequencesnindicate which test vectors of the fault detection test sequence need tonbe applied to the circuit. Experimental results presented indicate thatnthe proposed on-chip test generation method is effective in achievingnhigh levels of diagnostic-resolution