Theoretical logic performance estimation of Silicon, Germanium and SiGe nanowire Fin-Field Effect Transistor

摘要

In this paper, we propose and analyze three different nanowire FinFETs: Silicon, Germanium and SiGe nanowire FinFETs. We find that the logic performance parameters such as I-on/I-off ratio and drain-induced barrier lowering (DIBL) in the silicon structure show a significant promotion compared to two other structures. Then we study the influence of the parameters: doping concentration, dielectric thickness and the channel length in order to analyze and determine the short channel effects such as DIBL and also I-on/I-off ratio for switching application. It is shown that the ON current and therefore the I-on/I-off ratio in the structures can be improved by increasing the doping concentration and it also affects on DIBL. We also compared the analog performance parameters including the transconductance (g(m)), output conductance (g(d)) and voltage gain (A(v)) for all three simulated devices. The obtained results show that the SiGe FinFET is suitable for the analog application.