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机译:铜可塑性对3D集成电路的硅通孔(TSV)中硅中应力诱导的影响
College of Nanoscale Science and Engineering, University at Albany, Albany, NY, 12203, USA;
College of Nanoscale Science and Engineering, University at Albany, Albany, NY, 12203, USA;
SEMATECH, Albany, NY, 12203, USA;
College of Nanoscale Science and Engineering, University at Albany, Albany, NY, 12203, USA;
College of Nanoscale Science and Engineering, University at Albany, Albany, NY, 12203, USA;
Thermo-mechanical modeling; Through-silicon via; TSV; TSV array; Elasto-plastic copper; Residual stress; Stress superposition; Keep-out zone;
机译:铜可塑性对3D集成电路的硅通孔(TSV)中硅中应力诱导的影响
机译:用于三维堆叠集成电路(3D-SIC)架构的铜硅通孔(TSV)的工艺评估和附着力评估
机译:对“使用硅通孔的三维集成电路中的铜各向异性效应”的修正
机译:澄清通过多波长微拉曼光谱法测量的铜填充硅通孔(tsvs)周围硅中的应力场
机译:对3D集成电路中通过硅通孔的热应力和可靠性的缩放和微观结构效应
机译:三维集成电路(3D IC)关键技术:硅通孔(TSV)
机译:三维集成电路(3D IC)关键技术:硅通孔(TSV)