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A simulation study of the influence of a high-k insulator and source stack on the performance of a double-gate tunnel FET

机译:高k绝缘子和源堆对双栅极隧道FET性能影响的仿真研究

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The influence of incorporating HfO_2 as a dielectric at the drain side and a silicon stack at the source side on the electrical performance of a double-gate tunnel field-effect transistor (TFET) is investigated by comparing a conventional TFET structure with four other structures in which the gate dielectric material is either homogeneous or heterogeneous while the insulator on the drain side is either SiO_2 or HfO_2. Moreover, a structure with a silicon source stack is proposed and the figures of merit of the resulting device are compared with other counterparts. The results of the simulations reveal that the presence of an HfO_2 insulator on the drain side reduces the ambipolar conduction while the heterogeneous gate dielectric enhances the drive current and transconductance. However, the use of HfO_2 slightly deteriorates the source-gate and drain-gate capacitances in comparison with the conventional TFET. Furthermore, the incorporation of a silicon source stack along with a heterogeneous gate dielectric and HfO_2 insulator on the drain side leads to a higher I_(ON)/I_(OFF), lower subthreshold slope (S), and lower ambipolar conduction in the studied TFET with channel length of 50 nm.
机译:通过将传统的TFET结构与四个其他结构进行比较,研究将HFO_2作为漏极侧的电介质和源侧的电介质的影响和源极侧的电源侧的影响栅极电介质材料是均匀的或异质的,而排水侧的绝缘体是SiO_2或HFO_2。此外,提出了一种具有硅源堆叠的结构,并将所得装置的优点图与其他对应物进行比较。模拟结果表明,在排水侧上的HFO_2绝缘体的存在降低了非偏相栅极电介质增强了驱动电流和跨导的同时传导。然而,与传统的TFET相比,HFO_2的使用略微劣化源极栅极和漏极栅极电容。此外,在漏极侧上的硅源堆叠与异构栅极电介质和HFO_2绝缘体掺入漏极侧导致较高的I_(上)/ I_(OFF),较低的亚阈值斜率,以及研究中的更低的amiPOLAR传导TFET通道长度为50nm。

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