A new laterally conductive bridge random access memory by fully CMOS logic compatible process

摘要

This paper proposes a novel laterally conductive bridge random access memory (L-CBRAM) module using a fully CMOS logic compatible process. A contact buffer layer between the poly-Si and contact plug enables the lateral Ti-based atomic layer to provide on/off resistance ratio via bipolar operations. The proposed device reached more than 100 pulse cycles with an on/off ratio over 10 and very stable data retention under high temperature operations. These results make this Ti-based L-CBRAM cell a promising solution for advanced embedded multi-time programmable (MTP) memory applications.