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Optimum wire sizing of RLC interconnect with repeaters

机译:具有中继器的RLC互连的最佳电线尺寸

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Repeaters are often used to drive high impedance interconnects. These lines have become highly inductive and can affect signal behavior. The line inductance should therefore be considered in determining the optimum number and size of the repeaters driving a line. The optimum repeater system uses uniform repeater insertion in order to achieve the minimum propagation delay. A tradeoff exists, however, between the transient power dissipation and the minimum propagation delay in sizing long interconnects driven by the optimum repeater system. Optimizing the line width to achieve the minimum power delay product, however, can satisfy current high speed, low-power design objectives. A reduction in power of 65% and delay of 97% is achieved for an example repeater system. The Power-Delay-Area-Product (PDAP) criterion is introduced as an efficient technique to size the interconnect within a repeater system. A reduction in buffer area of 67% and interconnect area of 46% is achieved based on the PDAP.
机译:中继器通常用于驱动高阻抗互连。这些线已变成高感性,并可能影响信号行为。因此,在确定驱动线路的中继器的最佳数量和尺寸时,应考虑线路电感。最佳中继器系统使用均匀的中继器插入,以实现最小的传播延迟。但是,在确定由最佳转发器系统驱动的长互连的大小时,瞬态功耗和最小传播延迟之间存在折衷。优化线宽以实现最小的功率延迟积,但是可以满足当前的高速,低功率设计目标。对于示例中继器系统,功率降低了65%,延迟降低了97%。引入了功率延迟面积乘积(PDAP)标准,作为一种有效的技术来确定转发器系统内的互连大小。基于PDAP,缓冲区面积减少了67%,互连面积减少了46%。

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