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Building Blocks for a Millimeter-Wave Multiport Multicast Chip-to-Chip Interconnect Based on Dielectric Waveguides

机译:基于介电波导的毫米波多端口组播芯片到芯片互连的构建模块

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A multichip multiport communication network technology is proposed based on a network of dielectric waveguides. For optimum performance and best versatility, a combination of high-permittivity dielectric slab waveguide and low-permittivity flexible dielectric rod waveguide is proposed. Additional building blocks are a dielectric waveguide Y junction and transitions between waveguide types as well as between chip and waveguide. The resulting multichip multicast multiport interconnect network features low overall transmission loss and small chip-area consumption for the chip-to-waveguide transitions. Measurement results for all components are presented for frequency bands around 60 GHz and around 100 GHz. The insertion loss of the transition from on-chip microstrip line to dielectric slab waveguide, extracted from end-to-end measurements, is 3.3 dB around 60 GHz and 2.2 dB around 100 GHz. Experimental four-terminal networks, each comprising four chip-to-waveguide transitions and two dielectric waveguide Y junctions, show measured end-to-end insertion loss (including pass through two Y junctions and two chip-to-waveguide transitions) of 21 dB (around 60 GHz, covering 26-mm distance) and of 17 dB (around 100 GHz, covering 20-mm distance), respectively. These values outperform wireless interconnects by far and emphasize the performance and versatility of the proposed approach for chip-to-chip multicast multiport interconnects.
机译:提出了一种基于介质波导网络的多芯片多端口通信网络技术。为了获得最佳性能和最佳通用性,提出了高介电常数平板平板波导和低介电常数柔性棒形波导的组合。其他构建模块是介电波导Y结,以及波导类型之间以及芯片和波导之间的过渡。最终的多芯片多播多端口互连网络具有较低的总体传输损耗,并且芯片到波导的转换占用的芯片面积较小。给出了所有组件在60 GHz和100 GHz附近的测量结果。从端到端测量中提取的从片上微带线到介质平板波导的过渡的插入损耗在60 GHz左右为3.3 dB,在100 GHz左右为2.2 dB。实验性的四端网络分别包含四个芯片到波导的过渡和两个介电波导的Y结,显示出测得的21 dB的端到端插入损耗(包括通过两个Y结和两个芯片到波导的过渡) (大约60 GHz,覆盖26毫米的距离)和17 dB(大约100 GHz,覆盖20毫米的距离)。这些值远胜于无线互连,并强调了所提出的芯片对芯片多播多端口互连方法的性能和多功能性。

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