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Impact of Reducing STI-Induced Stress on Layout Dependence of MOSFET Characteristics

机译:减小STI引起的应力对MOSFET特性的布局依赖性的影响

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Active-area layout dependence of MOSFET parametric characteristics and its reduction by reducing shallow trench isolation (STI)-induced mechanical stress were investigated. Threshold voltages (V{sub}(th)) and saturation drain currents (I{sub}(ds)) become sensitive to the active-area layout of MOSFET in scaled-down technology. This phenomenon is the effect of mechanical stress from STI edge, which reduces impurity diffusion in channel region and enhances carrier mobility. To reduce the STI-induced stress, we examined STI-wall-oxide nitridation and STI gap-fill-oxide densifying in pure N{sub}2 ambient. These processes reduced the reoxidation of the STI wall oxide, therefore reduced the STI-induced stress. According to the new STI process, the active-area layout dependence of V{sub}(th) and I{sub}(ds) were reduced successfully.
机译:研究了有源区布局对MOSFET参数特性的依赖性及其通过减小浅沟槽隔离(STI)引起的机械应力而减小的原因。在按比例缩小的技术中,阈值电压(V {sub}(th))和饱和漏极电流(I {sub}(ds))对MOSFET的有源区域布局变得敏感。这种现象是来自STI边缘的机械应力的影响,它减少了沟道区域中的杂质扩散并增强了载流子迁移率。为了减少STI引起的压力,我们检查了纯N {sub} 2环境中的STI壁氧化物氮化和STI间隙填充氧化物致密化。这些过程减少了STI壁氧化物的再氧化,因此减少了STI诱导的应力。根据新的STI工艺,成功降低了V {sub}(th)和I {sub}(ds)的有效区域布局依赖性。

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