Layout Variation Effects in Advanced MOSFETs: STI-Induced Embedded SiGe Strain Relaxation and Dual-Stress-Liner Boundary Proximity Effect

摘要

This paper reports two areas of focus for layout variation effects in advanced strained-Si technology: 1) shallow-trench isolation (STI)-induced embedded SiGe (eSiGe) strain relaxation and 2) impact of dual-stress-liner (DSL) boundary on channel mobility. A complete data analysis, including two different strain measurement techniques of nanobeam diffraction and geometric phase analysis, is presented, along with a quantitative understanding for each effect. It is reported that the eSiGe profile can have a significant impact on the STI proximity effect for p-MOSFETs and that DSL boundary proximity can cause significant channel mobility degradation for both n- and p-MOSFETs. Both effects result in the reduction in channel strain along the [110] direction.