An extension of probabilistic simulation for reliability analysis of CMOS VLSI circuits

摘要

The probabilistic simulation approach is extended to include the computation of the variance waveform of the power/ground current, in addition to its expected waveform. The focus is on the problem of estimating the median time-to-failure (MTF) due to electromigration (EM) in the power and ground buses of CMOS circuits. Theoretical results that quantify the relationship between the MTF and the statistics of the stochastic current are presented. This leads to a more accurate estimate of the MTF that requires both the expected and variance waveforms. A novel technique is then presented to compute the variance waveform for CMOS circuits, which has been incorporated into the probabilistic simulator CREST. Results of this implementation demonstrating efficiency and accuracy on a number of circuits are provided. The authors use these results to study the importance of the variance waveform by estimating its contribution to the MTF relative to that of the expected waveform.