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Characterization and implementation of self-aligned TiSi/sub 2/ in submicrometer CMOS technology

机译:亚微米CMOS技术中自对准TiSi / sub 2 /的表征和实现

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Characterization and process implementation of a self-aligned TiSi/sub 2/ in a submicrometer CMOS process are presented. The effects of different in situ sputter etch configurations prior to Ti deposition on silicidation is discussed. It is shown that bridging is not only first RTP time- and temperature-dependent, but also dependent on the Ti(N) overetch time. The C49 to C54-TiSi/sub 2/ phase transformation is found to be dependent on both the C49-TiSi/sub 2/ film thickness and the linewidth. A potential degradation phenomenon with high-temperature back-end processing is discussed, and the impact of TiSi/sub 2/ on specific contact resistance and circuit performance is presented. Thin film analysis was done by Auger electron spectrometry, Rutherford backscattering spectrometry with 2-MeV He/sup +/, transmission electron microscopy, secondary ion mass spectrometry, X-ray diffraction, and X-ray fluorescence spectrometry. Sheet resistance measurements were carried out with a four-point probe.
机译:介绍了亚微米CMOS工艺中自对准TiSi / sub 2 /的表征和工艺实现。讨论了在Ti沉积之前不同的原位溅射刻蚀配置对硅化的影响。结果表明,桥接不仅取决于RTP时间和温度,还取决于Ti(N)的蚀刻时间。发现从C49到C54-TiSi / sub 2 /的相变既取决于C49-TiSi / sub 2 /膜的厚度,也取决于线宽。讨论了高温后端处理中的潜在退化现象,并提出了TiSi / sub 2 /对比接触电阻和电路性能的影响。薄膜分析通过俄歇电子能谱,具有2-MeV He / sup + /的卢瑟福背散射光谱,透射电子显微镜,二次离子质谱,X射线衍射和X射线荧光光谱进行。用四点探针进行薄层电阻测量。

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