首页> 外文期刊>IEEE Transactions on Electron Devices >Impact of time dependent dielectric breakdown and stress-induced leakage current on the reliability of high dielectric constant (Ba,Sr)TiO/sub 3/ thin-film capacitors for Gbit-scale DRAMs
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Impact of time dependent dielectric breakdown and stress-induced leakage current on the reliability of high dielectric constant (Ba,Sr)TiO/sub 3/ thin-film capacitors for Gbit-scale DRAMs

机译:时间依赖性介质击穿和应力引起的泄漏电流对Gbit级DRAM高介电常数(Ba,Sr)TiO / sub 3 /薄膜电容器可靠性的影响

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Time dependent dielectric breakdown (TDDB) and stress-induced leakage current (SILC) are investigated for the reliability of (Ba,Sr)TiO/sub 3/ (BST) thin films. Both time to breakdown (T/sub BD/) versus electric field (E) and T/sub BD/ versus 1/E plots show universal straight lines, independent of the film thickness, and predict lifetimes longer than 10 y at +1 V for 50 nm BST films with an SiO/sub 2/ equivalent thickness of 0.70 nm. SILC is observed at +1 V after electrical stress of BST films; nevertheless, 10 y reliable operation for Gbit-scale DRAMs is predicted in spite of charge loss by SILC. Lower (Ba+Sr)/Ti ratio is found to be strongly beneficial for low leakage, low SILC, long TBD, and therefore greater long-term reliability. This suggests a worthwhile tradeoff against the dielectric constant, which peaks at a (Ba+Sr)/Ti ratio of 1.05.
机译:针对(Ba,Sr)TiO / sub 3 /(BST)薄膜的可靠性,研究了时变介电击穿(TDDB)和应力引起的漏电流(SILC)。击穿时间(T / sub BD /)与电场(E)以及T / sub BD /与1 / E的曲线图均显示通用直线,与膜厚度无关,并预测+1 V时的寿命超过10年用于SiO / sub 2 /当量厚度为0.70 nm的50 nm BST膜。 BST膜受到电应力后,在+1 V下观察到SILC;尽管如此,尽管SILC会产生电荷损失,但仍可预测Gbit级DRAM能够可靠运行10年。发现较低的(Ba + Sr)/ Ti比对于低泄漏,低SILC,较长的TBD以及因此具有更高的长期可靠性非常有帮助。这表明值得在介电常数上进行权衡,介电常数在(Ba + Sr)/ Ti比为1.05时达到峰值。

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