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The partial silicon-on-insulator technology for RF power LDMOSFET devices and on-chip microinductors

机译:射频功率LDMOSFET器件和片上微电感器的部分绝缘体上硅技术

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A new partial silicon-on-insulator (SOI) formation technology and the associated RF LDMOSFET device structure on a silicon bulk substrate are proposed in this paper. The same technology can also be applied to enhance the quality factor of the integrated on-chip microinductors. The proposed technology is able to reduce both drain/substrate parasitics and leakage current for devices fabricated on bulk substrates. At the same time, the approach overcomes the thermal problem encountered by devices fabricated on full-SOI substrates. To demonstrate the technology, both partial-SOI LDMOSFET and microinductor devices were fabricated on a bulk wafer with their RF performance verified by laboratory measurements.
机译:本文提出了一种新的部分绝缘体上硅(SOI)形成技术以及在硅块状衬底上的相关RF LDMOSFET器件结构。同样的技术也可以用来提高集成的片上微电感器的品质因数。所提出的技术能够减少在大块衬底上制造的器件的漏极/衬底寄生效应和泄漏电流。同时,该方法克服了在全SOI衬底上制造的器件所遇到的热问题。为了演示该技术,部分SOI LDMOSFET和微电感器件均在体晶片上制造,其RF性能已通过实验室测量得到验证。

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