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A Compact Current–Voltage Model for 2D Semiconductor Based Field-Effect Transistors Considering Interface Traps, Mobility Degradation, and Inefficient Doping Effect

机译:考虑界面陷阱,迁移率降低和低效掺杂效应的基于2D半导体的场效应晶体管的紧凑电流电压模型

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摘要

This paper presents an analytical current–voltage model specifically formulated for 2-dimensional (2D) transition metal dichalcogenide (TMD) semiconductor based field-effect transistors (FETs). The model is derived from the fundamentals considering the physics of 2D TMD crystals, and covers all regions of the FET operation (linear, saturation, and subthreshold) under a continuous function. Moreover, three issues of great importance in the emerging 2D FET arena: interface traps, mobility degradation, and inefficient doping have been carefully considered. The compact models are verified against 2-D device simulations as well as experimental results for state-of-the-art top-gated monolayer TMD FETs, and can be easily employed for efficient exploration of circuits based on 2D FETs as well as for evaluation and optimization of 2D TMD-channel FET design and performance.
机译:本文提出了一种分析电流-电压模型,该模型专门针对基于二维(2D)过渡金属二卤化二锡(TMD)半导体的场效应晶体管(FET)制定。该模型从考虑2D TMD晶体物理原理的基本原理推导而来,涵盖了连续功能下FET工作的所有区域(线性,饱和和亚阈值)。此外,在新兴的2D FET领域中,三个非常重要的问题已得到认真考虑:接口陷阱,迁移率降低和低效掺杂。紧凑型模型经过2D器件仿真以及最先进的顶部浇口单层TMD FET的实验结果的验证,可轻松用于基于2D FET的电路的有效探索以及评估和2D TMD沟道FET设计和性能的优化。

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