首页> 外文期刊>IEEE Transactions on Electron Devices >A Physics-Based Compact Model for Ultrathin Black Phosphorus FETs—Part II: Model Validation Against Numerical and Experimental Data
【24h】

A Physics-Based Compact Model for Ultrathin Black Phosphorus FETs—Part II: Model Validation Against Numerical and Experimental Data

机译:超薄黑色磷FETS的基于物理学的紧凑型模型 - 第二部分:数值和实验数据模型验证

获取原文
获取原文并翻译 | 示例

摘要

In the first part of this article, a physics-based surface-potential compact model to describe current-voltage (I-V) relationship in few-layered ambipolar black phosphorus (BP) transistors is presented. The proposed model captures the essential physics of thin-film BP FETs by accounting for the effects of: 1) in-plane band-structure anisotropy in BP, as well as the asymmetry in electron and hole current conduction characteristics; 2) nonlinear Schottky-type source/drain contact resistances; 3) interface traps; 4) ambipolar current conduction in the device using two separate quasi-Fermi levels for electrons and holes; and 5) the effect of temperature on the model parameters. In this article, the model is validated against measured data of back-gated BP transistors with gate lengths of 1000 and 300 nm with the BP thickness of 7.3 and 8.1 nm and for the temperature range of 200-298 K. We also validate the model against numerical TCAD data of BP transistors with channel lengths of 300 and 600 nm and BP thickness of 6 nm. The model is also applied to unipolar 2-D FETs with channel materials, such as MoS2 and WSe2. Compared with prior BP FET models that are mainly suited for near-equilibrium transport and room-temperature operation, the model developed here shows excellent agreement with experimental and numerical data over broad bias and temperature range.
机译:在本文的第一部分中,提出了一种基于物理的表面电位紧凑型模型,用于描述少数层间的非芯片黑色磷(BP)晶体管中的电流电压(I-V)关系。所提出的模型通过算用于BP中的平面内带状结构各向异性的效果,以及电子和空穴电流传导特性的不对称性来捕获薄膜BP FET的基本物理学。 2)非线性肖特基型源/漏电池; 3)接口陷阱; 4)使用两个单独的准fermi水平的电子和孔中的装置中的Ambipolar电流传导; 5)温度对模型参数的影响。在本文中,该模型针对具有1000和300nm的栅极长度的后门控BP晶体管的测量数据验证,BP厚度为7.3和8.1nm,温度范围为200-298 K.我们还验证了模型针对具有300和600nm的通道长度为300和600nm的BP晶体管的数值TCAD数据和6nm的BP厚度。该模型也应用于具有通道材料的单极2-D FET,例如MOS2和WSE2。与主要适用于近均衡运输和室温操作的先前BP FET模型相比,该模型在此开发的模型与广泛偏置和温度范围内的实验和数值数据具有很好的一致性。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号