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A Physics-Based Compact Model for Ultrathin Black Phosphorus FETs—Part I: Effect of Contacts, Temperature, Ambipolarity, and Traps

机译:用于超薄黑色磷FET的基于物理的紧凑型模型 - 第一部分:接触,温度,余地和陷阱的影响

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We report a physics-based surface-potential compact model to describe current-voltage (I-V) relationship in a few-layered ambipolar black phosphorus (BP) transistors. To model the device electrostatics, the 2-D density of states of carriers and Fermi-Dirac statistics are used, while carrier transport is described using the drift-diffusion formalism. The model also comprehends the effects of interface traps and voltage-dependent Schottky-type source/drain contact resistances. Compared with prior BP FET models that are mainly suited for near-equilibrium transport and room-temperature operation, the model developed here is applicable over broad bias and temperature range. Validation of the model against measurement data of BP transistors with gate lengths 300-1000 nm and operating temperature from 200-298 K is demonstrated in a companion article.
机译:我们报告了一种基于物理的表面电位紧凑型模型,用于描述几个层间的Ambipolar黑色磷(BP)晶体管中的电流电压(I-V)关系。为了模拟装置静电,使用载流子和费米 - DIRAC统计的2-D密度,而使用漂移扩散形式主义描述载流子。该模型还介绍了界面陷阱和电压依赖性肖特基型源/漏电接触电阻的影响。与主要适用于近均衡运输和室温操作的先前BP FET模型相比,此处开发的模型适用于偏大和温度范围。在伴侣制品中,对具有栅极长度300-1000nm的BP晶体管的测量数据的验证验证与200-298k的工作温度。

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